Problem and Motivation
The challenges of the complexity explosion are driving a transformation to digital engineering, requiring an enterprise level commitment to engineering workflows that formalize digital
twinning and digital threading. The foundation of the digital thread is verification, without which the digital thread becomes ambiguous and un-reliable. Micro-electronics execution of
real-time control software becomes the focal point for many of the highest risk corner case issues. Industry cannot advance without robust & trusted digitally threaded verification of electronics that informs system behavior. This paper describes the implementation of a platform that conceives realizing this goal. The status of the platform is described with example work products.
State of Practice
Current practices are not able to digitally thread electronics verification. A primary limitation is that system architecture modeling methods are inadequate in decomposition and explicitness. Diagram-centric models confound requirement allocation and the expression of architecture behavior and structure adequate to drive electronics design flows. There needs to be an breakthrough in architecture modeling methods and tools. Siemens is solving this problem by applying the ARCADIA methodology and Capella-derived tooling which is tightly integrated within an Authoritative Source of Truth (ASoT). This capability is believed to be an industry first. With this capability realized, a diverse array of design and simulation tools can now interoperate with the architecture model; constraining and specifying design efforts and enabling the verification through simulation that the design’s performance will meet requirements.
Platform Description and Examples
At INCOSE IS 2021, a solutions pattern for such a platform was introduced, as well as several technology components that contribute to implementing the platform. In this presentation, we will provide an update by describing the platform currently being deployed in pilot projects. Users are brought onto the platform to perform work in 3 phases:
Phase 1 – Developing verifiable requirements
Phase 2 – Architecture, functional allocation, and analysis
Phase 3 – Design and verification of electronic elements
The presentation will include examples of the work products from each phase based on an aircraft landing gear system. Progress towards standards conformance will include SysML V2 representations. The audience will take away an understanding of the steps to implement and future proof MBSE for Electronics in their organizations and ecosystems.